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Silicon Case Studies

Our proven RISC-V projects demonstrate end-to-end capability from FPGA prototyping to manufactured silicon.

  • Game Engine Chip - Manufactured Silicon


    2022-2024 | Manufacturing Complete

    Our first custom chip - from FPGA prototype to 40 manufactured chips. The complete ASIC lifecycle.

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  • Commercial RISC-V Platform


    2025 | Active Commercial Project

    Dual RISC-V CPU integration (Andes + Synopsys) for trade show demonstrator and reference platform.

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  • eMil ML System


    2022-Today | Government-Funded Research

    Machine learning system optimization on RISC-V with custom FFT accelerator for edge processing.

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  • NEORV32 Tutorial


    2021 | Open-Source Contribution

    Custom CRC module integration tutorial for open-source RISC-V microcontroller.

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Project Timeline

gantt
    title Motius RISC-V Project History (2021-2025)
    dateFormat YYYY-MM
    section Education
    NEORV32 Tutorial        :done, neorv, 2021-09, 2021-12
    section Research
    eMil ML System          :active, emil, 2022-01, 2025-12
    section Manufacturing
    Game Engine FPGA Prototype     :done, pong1, 2022-01, 2022-06
    Game Engine Tape-Out Prep      :done, pong2, 2022-09, 2023-03
    Game Engine Manufacturing      :done, pong3, 2023-04, 2024-04
    Game Engine Testing/Board      :active, pong4, 2024-04, 2025-06
    section Commercial
    Commercial Platform     :active, quint, 2025-01, 2025-12
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Project Summary

Project Timeline Type CPU Core(s) FPGA Platform Status
Game Engine Chip 2022-2024 Manufacturing Custom game engine AMD Artix-7 → Silicon ✅ 40 chips received
Commercial Platform 2025-ongoing Commercial Andes + Synopsys Kintex-7, Ultrascale+ 🔄 Active development
eMil 2022-today Research Western Digital EH1 AMD Artix-7 🔄 Ongoing
NEORV32 2021 Education NEORV32 (open-source) AMD Artix-7 ✅ Complete

Key Achievements Across Projects

Silicon Manufacturing

  • ✅ First custom chip designed and manufactured
  • ✅ 40 working chips received in M.2 QFN package
  • ✅ Successfully debugged manufacturing defects
  • ✅ 18-24 month real-world timeline experienced
  • ✅ Open-source manufacturing flow proven (Google/efabless)

RISC-V Integration

  • ✅ 3 different RISC-V CPU cores integrated
  • ✅ Andes commercial CPU (commercial client)
  • ✅ Synopsys ARC-V CPU (commercial client)
  • ✅ Western Digital EH1 (eMil)
  • ✅ NEORV32 open-source (tutorial)

Custom IP Development

  • ✅ CRC module (NEORV32)
  • ✅ FFT accelerator (eMil)
  • ✅ Complete game engine (Game Engine - in silicon!)
  • ✅ All custom IP cores developed in-house

FPGA Platforms

  • ✅ AMD Xilinx Artix-7
  • ✅ AMD Xilinx Kintex-7
  • ✅ AMD Xilinx Ultrascale+
  • ✅ Multiple board variants (Nexys A7, Arty A7, Genesys 2)

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